Evaluate not emitting lfence and sfence instructions on x86 for R/W barriers

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    • Type: Improvement
    • Resolution: Fixed
    • Priority: Major - P3
    • WT11.3.0, 7.3.0-rc0
    • Affects Version/s: None
    • Component/s: None
    • Storage Engines
    • 2024-01-09 - I Grew Tired
    • 5

      On x86 WiredTiger emits lfence and sfence for read and write memory barriers respectively. These might not actually be needed. This ticket tracks the work required to come to a conclusion. Also, evaluate other platforms with strong memory models.

      If we decide to remove these fences, there could be significant work required in functional and performance testing. Consider creating multiple tickets if needed. More in the comments.

            Assignee:
            Luke Pearson
            Reporter:
            Sulabh Mahajan
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              Created:
              Updated:
              Resolved: